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| AT27C4096 Features * Fast Read Access Time - 55 ns * Low Power CMOS Operation * - 100 A Maximum Standby - 40 mA Maximum Active at 5 MHz JEDEC Standard Packages - 40-Lead 600 mil PDIP - 44-Lead PLCC - 40-Lead TSOP (10 mm x 14 mm) Direct Upgrade from 512K bit, 1M bit, and 2M bit (AT27C516, AT27C1024, and AT27C2048) EPROMs 5V 10% Power Supply High Reliability CMOS Technology - 2,000V ESD Protection - 200 mA Latchup Immunity RapidTM Programming Algorithm - 50 s/word (typical) CMOS and TTL Compatible Inputs and Outputs Integrated Product Identification Code Commercial and Industrial Temperature Ranges * * * * * * * 4-Megabit (256K x 16) OTP EPROM AT27C4096 Description The AT27C4096 is a low-power, high-performance 4,194,304-bit one-time programmable read only memory (OTP EPROM) organized 256K by 16 bits. It requires a single 5V power supply in normal read mode operation. Any word can be accessed in less than 55 ns, eliminating the need for speed-reducing WAIT states. The by-16 organization makes this part ideal for high-performance 16- and 32-bit microprocessor systems. (continued) Pin Configurations Pin Name A0 - A17 O0 - O15 CE OE NC Note: PDIP Top View Function Addresses Outputs Chip Enable Output Enable No Connect Both GND pins must be connected. PLCC Top View TSOP Top View Type 1 0311E-A-06/97 1 Description In read mode, the AT27C4096 typically consumes 15 mA. Standby mode supply current is typically less than 10 A. The AT27C4 096 is a va ila ble i n i ndus tr y st anda rd JEDEC-approved one-time programmable (OTP) plastic PDIP, PLCC, and TSOP packages. The device features two-line control (CE, OE) to eliminate bus contention in high-speed systems. With high density 256K word storage capability, the AT27C4096 allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media. Atmel's AT27C4096 has additional features that ensure high quality and efficient production use. The RapidTM Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 50 s/word. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages. System Considerations Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in device non-conformance. At a minimum, a 0.1 F high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 F bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array. 2 AT27C4096 AT27C4096 Block Diagram Absolute Maximum Ratings* Temperature Under Bias ......................-55C to +125C Storage Temperature............................-65C to +150C Voltage on Any Pin with Respect to Ground ...............................-2.0V to +7.0V(1) Voltage on A9 with Respect to Ground ............................-2.0V to +14.0V(1) Note: *NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. VPP Supply Voltage with Respect to Ground .............................-2.0V to +14.0V(1) Maximum voltage is -0.6V dc which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is VCC + 0.75V dc which may overshoot to +7.0V for pulses of less than 20 ns. Operating Modes Mode/Pin Read Output Disable Standby Rapid Program(2) PGM Verify PGM Inhibit Product Identification(4) Notes: 1. X can be VIL or VIH. 2. Refer to the Programming characteristics. 3. VH = 12.0 0.5V. 4. Two identifier words may be selected. All Ai inputs are held low (VIL), except A9, which is set to VH, and A0, which is toggled low (VIL) to select the Manufacturer's Identification word and high (VIH) to select the Device Code word. 5. Standby VCC current (ISB) is specified with VPP = VCC. VCC > VPP will cause a slight increase in ISB. CE VIL X VIH VIL VIH VIH VIL OE VIL VIH X VIH VIL VIH VIL Ai Ai X X Ai Ai X A9 = VH A0 = VIH or VIL A1 - A17 = VIL (3) VPP X(1) X X(5) VPP VPP VPP VCC Outputs DOUT High Z High Z DIN DOUT High Z Identification Code 3 DC and AC Operating Conditions for Read Operation AT27C4096 -55 Operating Temperature (Case) VCC Power Supply Com. Ind. 0C - 70C -40C - 85C 5V 10% -70 0C - 70C -40C - 85C 5V 10% -90 0C - 70C -40C - 85C 5V 10% -12 0C - 70C -40C - 85C 5V 10% -15 0C - 70C -40C - 85C 5V 10% DC and Operating Characteristics for Read Operation Symbol ILI ILO IPP1 (2) Parameter Input Load Current Output Leakage Current VPP(1) Read/Standby Current Condition VIN = 0V to VCC VOUT = 0V to VCC VPP = VCC ISB1 (CMOS) CE = VCC 0.3V ISB2 (TTL) CE = 2.0 to VCC + 0.5V f = 5 MHz, IOUT = 0 mA, CE = VIL Min Max 1 5 10 100 1 40 Units A A A A mA mA V V V V ISB VCC(1) Standby Current ICC VIL VIH VOL VOH Notes: VCC Active Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage -0.6 2.0 IOL = 2.1 mA IOH = -400 A 2.4 0.8 VCC + 0.5 0.4 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. 2. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP. AC Characteristics for Read Operation AT27C4096 -55 Symbol tACC(3) tCE(2) tOE (2)(3) -70 Min Max 70 70 30 20 Min -90 Max 90 90 35 20 Min -12 Max 120 120 40 30 Min -15 Max 150 150 50 35 Units ns ns ns ns Parameter Address to Output Delay CE to Output Delay OE to Output Delay OE or CE High to Output Float, whichever occurred first Output Hold from Address, CE or OE, whichever occurred first Condition CE = OE = VIL OE = VIL CE = VIL Min Max 55 55 20 20 tDF(4)(5) tOH(4) Note: 7 7 0 0 0 ns 2, 3, 4, 5. See the AC Waveforms for Read Operation diagram. 4 AT27C4096 AT27C4096 AC Waveforms for Read Operation(1) Notes: 1. 2. 3. 4. 5. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC. This parameter is only sampled and is not 100% tested. Output float is defined as the point when data is no longer driven. Input Test Waveforms and Measurement Levels For -55 devices only: Output Test Load tR, tF < 5 ns (10% to 90%) For -70, -90, -12 and -15 devices: Note: CL = 100 pF including jig capacitance, except for the -45 and -55 devices, where CL = 30 pF. tR, tF < 20 ns (10% to 90%) Pin Capacitance (f = 1 MHz T = 25C)(1) Typ CIN COUT Note: Max 10 12 Units pF pF Conditions VIN = 0V VOUT = 0V 4 8 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. 5 Programming Waveforms(1) Notes: 1. 2. 3. The Input Timing Reference is 0.8V for V IL and 2.0V for VIH. tOE and tDFP are characteristics of the device but must be accommodated by the programmer. When programming the AT27C4096, a 0.1 F capacitor is required across VPP and ground to suppress spurious voltage transients. DC Programming Characteristics TA = 25 5C, VCC = 6.5 0.25V, VPP = 13.0 0.25V Limits Symbol ILI VIL VIH VOL VOH ICC2 IPP2 VID 6 Parameter Input Load Current Input Low Level Input High Level Output Low Voltage Output High Voltage VCC Supply Current (Program and Verify) VPP Supply Current A9 Product Identification Voltage CE = VIL 11.5 IOL = 2.1 mA IOH = -400 A 2.4 50 30 12.5 Test Conditions VIN = VIL, VIH -0.6 2.0 Min Max 10 0.8 VCC + 0.7 0.4 Units A V V V V mA mA V AT27C4096 AT27C4096 AC Programming Characteristics TA = 25 5C, VCC = 6.5 0.25V, VPP = 13.0 0.25V Limits Symbol tAS tOES tDS tAH tDH tDFP tVPS tVCS tPW tOE tPRT Notes: Parameter Address Setup Time OE Setup Time Data Setup Time Address Hold Time Data Hold Time OE High to Output Float Delay(2) VPP Setup Time VCC Setup Time CE Program Pulse Width(3) Data Valid from OE VPP Pulse Rise Time During Programming Test Conditions(1) Min 2 2 Max Units s s s s s Input Rise and Fall Times (10% to 90%) 20ns Input Pulse Levels 0.45V to 2.4V Input Timing Reference Level 0.8V to 2.0V Output Timing Reference Level 0.8V to 2.0V 2 0 2 0 2 2 47.5 52.5 150 50 130 ns s s s ns ns 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP. 2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven --see timing diagram. 3. Program Pulse width tolerance is 50 sec 5%. Atmel's 27C4096 Intergrated Product Identification Code Pins Codes Manufacturer Device Type A0 0 1 015-08 0 0 O7 0 1 O6 0 1 O5 0 1 O4 1 1 O3 1 0 O2 1 1 O1 1 0 O0 0 0 Hex Data 001E 00F4 7 Rapid Programming Algorithm A 50 s CE pulse width is used to program. The address is set to the first location. V CC is raised to 6.5V and V PP is raised to 13.0V. Each address is first programmed with one 50 s CE pulse without verification. Then a verification/reprogramming loop is executed for each address. In the event a word fails to pass verification, up to 10 successive 50 s pulses are applied with a verification after each pulse. If the word fails to verify after 10 pulses have been applied, the part is considered failed. After the word verifies properly, the next address is selected until all have been checked. VPP is then lowered to 5.0V and VCC to 5.0V. All words are read again and compared with the original data to determine if the device passes or fails. 8 AT27C4096 AT27C4096 Ordering Information ICC (mA) tACC (ns) 55 Active 40 Standby 0.1 Ordering Code AT27C4096-55JC AT27C4096-55PC AT27C4096-55VC AT27C4096-55JI AT27C4096-55PI AT27C4096-55VI AT27C4096-70JC AT27C4096-70PC AT27C4096-70VC AT27C4096-70JI AT27C4096-70PI AT27C4096-70VI AT27C4096-90JC AT27C4096-90PC AT27C4096-90VC AT27C4096-90JI AT27C4096-90PI AT27C4096-90VI AT27C4096-12JC AT27C4096-12PC AT27C4096-12VC AT27C4096-12JI AT27C4096-12PI AT27C4096-12VI AT27C4096-15JC AT27C4096-15PC AT27C4096-15VC AT27C4096-15JI AT27C4096-15PI AT27C4096-15VI Package 44J 40P6 40V 44J 40P6 40V 44J 40P6 40V 44J 40P6 40V 44J 40P6 40V 44J 40P6 40V 44J 40P6 40V 44J 40P6 40V 44J 40P6 40V 44J 40P6 40V Operation Range Commercial (0C to 70C) Industrial (-40C to 85C) Commercial (0C to 70C) Industrial (-40C to 85C) Commercial (0C to 70C) Industrial (-40C to 85C) Commercial (0C to 70C) Industrial (-40C to 85C) Commercial (0C to 70C) Industrial (-40C to 85C) 40 0.1 70 40 0.1 40 0.1 90 40 0.1 40 0.1 120 40 0.1 40 0.1 150 40 0.1 40 0.1 Package Type 44J 40P6 40V 44 Lead, Plastic J-Leaded Chip Carrier (PLCC) 40 Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) 40 Lead, Plastic Thin Small Outline Package (TSOP) 10 x 14 mm 9 |
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